Design-Reuse

A High-Performance Platform Architecture for MIPS Processors

Sustaining high processor performance in real-world applications requires careful SoC architecture. For example, an L2 cache may be needed to minimize memory latency, especially for single-threaded ...
經濟通ET Net

MIPS Releases P8700, Industry’s First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles

SAN JOSE, CALIFORNIA - Media OutReach Newswire - 22 November 2024 - MIPS, a leading developer of efficient and configurable IP compute cores, announced today the general availability (GA) launch of ...
Zawya

MIPS Releases P8700, Industry’s First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles

MIPS Out-of-Order Multi-threading - enables execution of multiple instructions from multiple threads (harts) every clock cycle, providing higher utilization and CPU efficiency. Coherent Multi-Core, ...
Design-Reuse

MIPS Technologies Licenses MIPS32(R) 24KEc(TM) Processor Core to Fangtek Ltd. for Mobile Phone Applications

Latest China Licensee Achieves Lower Power Consumption, Higher Performance, Lower Cost Using MIPS(R) Core in New Media Processors MOUNTAIN VIEW, Calif. -- April 5, 2006-- MIPS Technologies, Inc., a ...
VentureBeat

MIPS releases RISC-V CPU for autonomous vehicles

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More MIPS released its P8700 CPU based on the RISC-V computing architecture to ...
manilatimes

MIPS Releases P8700, Industry's First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles

SAN JOSE, CALIFORNIA - Media OutReach Newswire - 22 November 2024 - MIPS, a leading developer of efficient and configurable IP compute cores, announced today the general availability (GA) launch of ...