EDN

Tutorial on PLLs: Part 1

Few topics in electrical engineering have demanded as much attention over the years as the phase-locked loop (PLL). The PLL is arguably one of the most important building blocks necessary for modern ...
EDN

Tutorial on PLLs: Part 2

The MAP estimator form is used for the estimation of random parameters whereas the maximum-likelihood (ML) form is generally associated with the estimation of deterministic parameters. From Bayes Rule ...
IEEE

Tutorial: Low-Jitter PLLs for Wireless Transceivers

Abstract: PLLs and frequency synthesizers are key building blocks in wireless transceivers. With the trend of higher data-rate, higher carrier frequency and higher order of modulation, the jitter or ...
GitHub

STM32L432KC Clock Configuration Tutorial

This tutorial includes code to configure the PLL on the STM32L432KC. It is a structured tutorial Git repository where the commits are designed to represent different steps in the configuration process ...
IEEE

Tutorial: Design Trade-Offs in Digital Intensive PLLs

Abstract: The tutorial will give a comprehensive overview and provide an intuitive understanding of digital PLLs in spatial domain. Operating principles and limitations of digital PLLs are ...
GitHub

jacksonphilion/tutorial-clock-lab-4

This tutorial includes code to configure the PLL on the STM32L432KC. It is a structured tutorial Git repository where the commits are designed to represent different steps in the configuration process ...